CS203: Advanced Computer Architecture (2024 Fall)
Lecture: TuTh 11a – 12:20p
Where: Watkins Hall | Room 1000
Instructor
Hung-Wei Tseng
email: cs203 @ escalab.org
Office Hours: W 2p-4p @ WCH 406
Teaching Assistant
Jinyoung Choi
email: cs203 @ escalab.org
Office Hours: Tu 4p-5p, Th 4p-6p @ WCH 110
Other important links
- Assignment & Reading quizzes submission through Gradescope: https://www.gradescope.com/courses/863120
- Discussion Forum on Discord: Please find the link in your course agreement on Gradescope.
- Lecture recordings: Youtube Channel
- Calendar: Google Calendar
Course Overview
This course will describe the basics of modern processor operation and techniques to optimize your applications. Topics include computer system performance, instruction set architectures, pipelining, branch prediction, memory-hierarchy design, and a brief introduction to multiprocessor architecture issues.
Text books
Required: Patterson & Hennessy, Computer Architecture: A Quantitative Approach, David Patterson & John Hennessy, Morgan Kaufmann, 6th Edition and assigned research papers.
Required: Other assigned readings throughout the quarter.
Many research papers will require campus network to download. For instructions of connecting to UCR VPN and download research papers, please visit https://library.ucr.edu/using-the-library/technology-equipment/connect-from-off-campus
Grading
- Course Agreement
- Please review and complete the course agreement before you start working on the class. Any effort made prior to the course agreement does not count toward your final grade.
- Assignments 25%
- Assignments will be assigned throughout the course. We will drop your lowest one.
- Our assignments will be based on Jupyterhub/Jupyter notebooks and programming — everyone is supposed to have a unique turnin. There is no group submission or collaboration allowed.
- There is no regrading on assignments except for obvious grading errors. Please make sure your answers are clearly comprehensible to our grading staffs and follow the guideline of answering assignment questions.
- Peer instruction
- This class uses “peer instruction” as our teaching method
- To encourage your participation in peer instructions, we count your participation in peer instructions throughout the quarter as one assignment. In other words, if you opt out from peer instructions, this one will become the one that is dropped from your assignments.
- To participate in peer instructions, we require each of you to download poll everywhere App or navigate/login to their website during the class if you would like to earn credits from participating in peer instructions.
- You must login with UCRNetID@ucr.edu. If you didn’t do it right, you won’t get credits.
- You need to answer 50% of the poll questions to receive full credits on peer instructions.
- Reading Quizzes 15%
- We will have reading quizzes on GradeScope
- Only one shot, but time unlimited. We will drop your lowest two quiz grades.
- Midterm 25%
- Final 35%
The final will be cumulative. - Additional notes about grades/assignments in this course
- Your score will be available on gradescope. Your final grade is the weighted average of these grades.
We do our best to record grades accurately, but you should double-check. - Deadlines.
- All deadlines are hard deadlines. You should not expect any extension of the deadline.
- It is your responsibility to keep up with the schedule.
- We won’t grant any exception especially for late enrollment. You should have enrolled and prioritized CS203 over other courses if you’re really interested in this class.
- If you have medical emergency that prevents you from finishing on time, you have to provide the proof before asking for extensions.
- Late submission: We do not accept any late submission, including quiz and assignments unless you obtain a proof from Student Disability Resource Center and give us a notice 24 hours before the submission due date.
- Errors in grading: If you feel there has been an error in how an examine was graded, you have one week from when the examine is return to bring it to our attention. For items with submissions through gradescope, please create a request through gradescope.
- For midterm and final: We do not regrade on a single problem. We will re-grade your whole test.
- Final grades: If you have a problem with your final grade in the course, send me email and we can set up an appointment to discuss it.
- Your score will be available on gradescope. Your final grade is the weighted average of these grades.
Schedule and Slides
| Topic | Readings (Required) | Preview Slides | Slides & Demo | Due Dates | Release/Notes | |
| 9/26/2024 | Introduction How to start CS203 assignments | – G.E. Moore. Cramming More Components Onto Integrated Circuits. Electronics, pp. 114–117, April 19, 1965. – P&H (Textbook): Chapter 1.1-1.6 – John L. Hennessy and David A. Patterson. A new golden age for computer architecture. Communications of the ACM, Volume 62, Issue 2, 2019 | (1) Why should I take and care about CS203? Demo: myths in programming | Course agreement | Programming Assignment 1 Released Please watch this video before you start working on assignments | |
| 10/1/2024 | Performance Evaluation (I) | – x86-64 Machine-Level Programming – P&H (Textbook): Chapter 1.8 – V. Sze, Y. -H. Chen, T. -J. Yang and J. S. Emer. How to Evaluate Deep Neural Network Processors: TOPS/W (Alone) Considered Harmful. In IEEE Solid-State Circuits Magazine, vol. 12, no. 3, pp. 28-41, Summer 2020. – Amin Vahdat, Xiaoyu Ma, David Patterson. New Computer Evaluation Metrics for a Changing World. Communications of the ACM. 2024 | Performance (Preview) | (2) Performance (I): What defines perfect? Demo: Choosing the right metrics Demo: Power & Energy | Reading Quiz #1 | Assignment 1 Released |
| 10/3/2024 | Performance Evaluation (II) | (3) Performance (2): What can I affect? Demo: what PL/you/compiler can affect | Programming Assignment #1 due | |||
| 10/8/2024 | Performance Evaluation (III) | – P&H (Textbook): Chapter 1.9 – M. D. Hill and M. R. Marty. Amdahl’s Law in the Multicore Era. in Computer, vol. 41, no. 7, pp. 33-38, July 2008. | (4) Performance (3): Do the right thing Demo: Amdahl’s Law | Reading Quiz #2 | ||
| 10/10/2024 | Memory Hierarchy (1): The Basics | – P&H (Textbook): Appendix B.1-B.3 | Basics of Memory Hierarchy (Preview) | (5) Memory (1): The basics of memory hierarchy Demo: Memory Hierarchy and Code Locality | Assignment 1 due | Assignment 2 and Programming Assignment 2 Release |
| 10/15/2024 | Memory Hierarchy (2) | – P&H (Textbook): Appendix B.1-B.3, 2.3 | (6) Memory (2): The ABCs of memory hierarchy Demo: Simulate the cache! | Reading Quiz #3 | ||
| 10/17/2024 | Memory Hierarchy (3): Optimizing Cache Performance Applications | – P&H (Textbook): Chapter 2.3 – Norman P. Jouppi. Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers. ISCA 1990 – S. Steinke, L. Wehmeyer, Bo-Sik Lee and P. Marwedel. Assigning program and data objects to scratchpad for energy reduction. In Design, Automation and Test in Europe Conference and Exhibition 2002 (DATE 2002) | Hardware Optimizations for Cache Performance (Preview) | (7) Memory (3): Cache misses and their remedies (the hard way) Demo: simulate the cache on intel Core i7 | Assignment 3 release | |
| 10/22/2024 | Memory Hierarchy (4): Programmer’s optimizations | Software Optimizations for Cache Performance (Preview) | (8) Memory (4): Cache misses and their remedies (the soft way) Demo: Software Optimizations | Reading Quiz #4 | ||
| 10/24/2024 | Memory Hierarchy (5): Case Study – Matrix Multiplications | (9) Memory (5): Cache misses and their remedies: A Case Study Demo: Tiled Matrix Multiplications | Assignment 2 due | |||
| 10/29/2024 | Virtual Memory | – P&H (Textbook): Chapter B.4 & B.5, 2.4- Thomas W. Barr, Alan L. Cox, and Scott Rixner. 2010. Translation caching: skip, don’t walk (the page table). ISCA 2010 | Virtual Memory (Preview) | (10) Virtual Memory: Just an illusion Demo: Virtual Memory | Reading Quiz #5 | |
| 10/31/2024 | Basic Processor Design & Branch Prediction | – P&H (Textbook): Chapter 3.3 – P&H (Textbook): Appendix C.1 – C.4 | Basic Pipeline Processors (Preview) | (11) Basic Processor Design and Sample Midterm Demo: Pipeline and performance | Assignment 3 due | |
| 11/5/2024 | Midterm | |||||
| 11/7/2024 | Advanced Branch Prediction | – M. Evers, S. J. Patel, R. S. Chappell and Y. N. Patt, “An analysis of correlation and predictability: what makes two-level branch predictors work,” Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235), Barcelona, Spain, 1998, pp. 52-61. – James E. Smith. Retrospective: a study of branch prediction strategies. ISCA ’98: 25 years of the international symposia on Computer architecture (selected papers), New York, NY, USA, 1998, pages 22-23 – Jiménez, Daniel A., and Calvin Lin. “Dynamic branch prediction with perceptrons.” Proceedings HPCA Seventh International Symposium on High-Performance Computer Architecture. IEEE, 2001. – André Seznec and P. Michaud. A case for (partially) TAgged GEometric history length branch prediction. Journal of Instruction Level Parallelism. June 2006. | Branch Prediction (Preview) | (12) Modern Processor Design (2): Dynamic Branch Prediction Demo: the effect of branch prediction | Reading Quiz #6 Programming Assignment #2 due | Assignment 4 release |
| 11/12/2024 | Branch Prediction (cont.) & Data Hazards | – P&H (Textbook): Chapter 3.4 | Data Hazards/OoO Scheduling (Preview) | (13) Modern Processor Design (3): Branch Prediction (cont.) & Data Hazards Demo: How branch is implemented | Reading Quiz #7 | |
| 11/14/2024 | OOO Scheduling | – K. C. Yeager, “The MIPS R10000 superscalar microprocessor,” in IEEE Micro, vol. 16, no. 2, pp. 28-41, April 1996. – E. Rotem et al.. Intel Alder Lake CPU Architectures. in IEEE Micro, vol. 42, no. 3, pp. 13-19, 2022. – (Optional) A. Gonzalez, J. Gonzalez and M. Valero, “Virtual-physical registers,” Proceedings 1998 Fourth International Symposium on High-Performance Computer Architecture, Las Vegas, NV, USA, 1998, pp. 175-184, doi: 10.1109/HPCA.1998.650557. | (14) Modern Processor Design (4): Try everything — OoO execution Demo: Loop Unrolling | Programming Assignment #3 Released | ||
| 11/19/2024 | Programming on modern SuperScalar/OoO processors | (15) Programming on Modern Processors: The single threaded version Demo: Linked List vs. Array Demo: popcounts | Reading Quiz #8 | |||
| 11/21/2024 | Parallel Architectures & Parallel Programming | – P&H (Textbook): Chapter 3.11 – Exploiting choice: instruction fetch and issue on an implementable simultaneous multithreading processor. Dean M. Tullsen, Susan J. Eggers, Joel S. Emer, Henry M. Levy, Jack L. Lo, and Rebecca L. Stamm, ISCA ’96: Proceedings of the 23rd annual international symposium on Computer architecture, New York, NY, USA, 1996, pages 191-202. – Chapter 5.1 – 5.3, 5.5 & 5.6 – The case for a single-chip multiprocessor, Kunle Olukotun, Basem A. Nayfeh, Lance Hammond, Ken Wilson, and Kunyung Chang, SIGPLAN Not. 31(9):2-11, 1996. | Parallel Architectures & Programming (Preview) | (16) Programming on Modern Processors (cont.) & Parallel Architectures Demo: SMT | Assignment 4 due | |
| 11/26/2024 | Parallel Architectures & Parallel Programming | Luiz André Barroso, Jeffrey Dean, and Urs Hölzle. 2003. Web Search for a Planet: The Google Cluster Architecture. IEEE Micro 23, 2 (March 2003), 22–28. | (17) Programming on Multithreaded Architectures Demo: coherency & consistency | Assignment #5 Released | ||
| 12/3/2024 | Dark Silicon | – P&H (Textbook): Chapter 1.7 – H. Esmaeilzadeh, E. Blem, R. St. Amant, K. Sankaralingam and D. Burger. Dark Silicon and the End of Multicore Scaling. In IEEE Micro, vol. 32, no. 3, pp. 122-134, May-June 2012. – Rakesh Kumar, Keith Farkas, Norm P. Jouppi, Partha Ranganathan, Dean M. Tullsen. Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction. In 36th International Symposium on Microarchitecture, December, 2003. | New Golden Age of Computer Architecture (Preview) | (18) Dark Silicon Problem Demo: Power/Energy | Reading Quiz #9 | |
| 12/5/2024 | TPU, DSA | – William J. Dally, Yatish Turakhia, and Song Han. Domain-specific hardware accelerators. Communications of the ACM 63, 7, 2020. – Norman P. Jouppi, Cliff Young, et. al.. In-Datacenter Performance Analysis of a Tensor Processing Unit. In Proceedings of the 44th Annual International Symposium on Computer Architecture (ISCA 2017). – John L. Hennessy and David A. Patterson. A new golden age for computer architecture. Communications of the ACM, Volume 62, Issue 2, 2019 – (Optional) Thomas Norrie, Nishant Patil, Doe Hyun Yoon, George Kurian, Sheng Li, James Laudon, Cliff Young, Norman Jouppi, and David Patterson. The Design Process for Google’s Training Chips: TPUv2 and TPUv3. In IEEE Micro, vol. 41, no. 2, pp. 56-63, 1 March-April 2021, doi: 10.1109/MM.2021.3058217 | (19) The new golden age of computer architecture & sample final Demo: big.LITTLE Demo: GPTPU | Assignment #5 & Programming Assignment #3 Due | ||
| 12/10/2024 8a-11a | Final Exam | For CS203 students from a prior quarter taking the make-up CEP questions, please fill the form https://forms.gle/Prem6vmA3wMTmRveA | https://registrar.ucr.edu/registering/plan-for-final-exams#tuesday_thursday |
Assignments
You are strongly encouraged to watch this video before you start your first assignment.
Programming Assignment #1 (Due 10/3/2024)
Assignment #1 (Due 10/10/2024)
Assignment #2 (Due 10/24/2024)
Assignment #3 (Due 10/31/2024)
Programming Assignment #2 (Due 11/7/2024)
Assignment #4
Assignment #5
Programming Assignment #3
How am I doing?
Please find your current grade in the following iframe or log in through https://www.escalab.org/my_grades/ first. The grade is updated periodically, not always up-to-date.
Other Policies
Integrity Policy
- Cheating WILL be taken seriously. Doing otherwise is not fair to honest students. It is also not fair to allow the cheater to thing that it is a reasonable alternative in life.
- Please review the UCR student handbook for more details on Academic Integrity.
- Anyone copying information or having information copied during a test will receive an F for the class and will not be allowed to drop. They will be reported to their college dean. If you can prove non-cooperative copying took place, your grade may be restored, but you must prove it to the dean–I don’t want to be involved. Anyone caught cheating or falsely representing the work of others on the homework will not be allowed to turn in further homework. Your grade will be based exclusively on the tests with a penalty of 25% OR GREATER applied.
- We photocopy a random sampling of the exams in order to ensure that students do not modify their tests after they have been returned.
- Online solutions, etc.: A solutions manual exists for this text. Using it, or any solutions you may find on the internet elsewhere IS CHEATING and will be dealt with accordingly. We know what the solution manual solutions look like. Homework is a small fraction of your grade, so cheating on it is unproductive.
Public Health Regulation
- If you have any symptom of COVID-19 or seasonal flu, please stay at home.